1. Field of the Invention
This invention relates to an interconnection forming method applied in the manufacturing field of a semiconductor device, etc., and more particularly to a method for carrying out etch-back of a refractory metal layer formed by the so-called blanket CVD process by using a small system while suppressing the loading effect.
2. Description of the Prior Art
As found in recent VLSI or ULSI, etc., there is a tendency such that the ratio occupied by the interconnecting portion on a device chip increases in accordance with development of high integration and high performance of semiconductor devices. In order to prevent a chip area from being increasing to much degree, multilevel interconnection has been now an essential or indispensable technology. Hitherto, as the interconnection forming method, it has been carried out to form a metal thin film comprised of aluminum, etc. by using the sputtering process. However, under the circumstances where multilevel interconnection has been developed as described above, so a surface step of a substrate body or an aspect ratio of a through hole increases, unsatisfactory connection between an upper metallization layer and the semiconductor substrate and/or unsatisfactory connection between metallization layers have been already serious problem because of insufficient step coverage in the sputtering process.
In view of this, there has been recently proposed a technology to selectively grow refractory metal such as tungsten (W), molybdenum (Mo), tantalum (Ta), or titanium (Ti), etc., or metal such as aluminum or copper, etc. in a through hole to thereby fill or bury a through hole of high aspect ratio with such metal. As a technique of such a selective growth, the selective CVD process to reduce gas such as metal fluoride or organometallic compound, etc. by a lower conductive material to deposit metal is the representative thereof.
However, while the selective CVD process can provide considerably satisfactory results at the level of study, it has the drawbacks that selectivity is degraded with lapse of time, that controllability in removing etch-back of an overgrowth section ordinarily called a nail head is poor, and the like. Contrary to expectation at the beginning, it is thus the present state that no clear view of situation of introduction to mass production is formed.
In place of this selective CVD, attention has again been drawn to the blanket CVD process. This blanket CVD process is a technology to deposit metal or alloy on the entire surface of a substrate body. As the representative of this blanket CVD process, there is known a process to coat the entire surface of, e.g., an insulating film in which a through hole is opened to form a refractory metal layer such as W, etc. in such a manner that the through hole is filled or buried.
Meanwhile, in the case of allow the refractory metal layer to be buried into the through hole to use it as the so-called plug, etch-back of the refractory metal layer is required as a matter of course. At this etch-back process, over etching of about 5 to 10% is ordinarily carried out by taking into consideration uniformness of the processing in the wafer plane. However, it is to be noted that etchrates at respective portions in a single wafer plane would be generally diverse. Namely, at the portion close to the region having a relatively high plasma density within an etching system, an etchrate thereof is higher than those at portions except for the above. For this reason, a sudden decrease in the area subject to etching followed by exposure of the interlayer insulating film takes place at an early stage of the etch-back process. This results in the problem that etchants which have been relatively excessive as the result of the fact that an object to be bonded (i.e., refractory metal) is lost concentrate on the internal portion of the through hole, and greatly erode the refractory metal layer buried therein.
Let now consider the case where, for example, as shown in FIG. 1a, an interlayer insulating film 2 having a through hole 3 opened is formed on a semiconductor substrate 1, and a Blk-W layer 4 formed by the blanket CVD process is deposited in a manner to coat the entire surface of the interlayer insulating film 2. When it is now assumed that the Blk-W layer 4 is etched back by using fluorine gas, F* (fluorine radical) becomes surplus or excessive in the vicinity of the region having high plasma density at an early time at the stage where the surface of the interlayer insulating film 2 is exposed. For this reason, such F* concentrates on the surface of the Blk-W layer 4 buried in the through hole 3, so a large eroded portion 5 as shown in FIG. 1b would be formed while over etching is carried out.
This is a phenomenon called a loading effect. Such a phenomenon is the cause to substantially prevent the blanket CVD process from being put into practice. In the manufacturing field of future semiconductor devices, since it is expected that the diameter of the wafer will be enlarged according as the device chip becomes large, and a single wafer etching system for carrying out etching at a high rate by using high density plasma in order not to lower the throughput will becomes the main current, it is considered that the loading effect becomes more conspicuous. Accordingly, it is required to take an early measure to solve the above problems.
As the measure which can solve the above problems, it is conceivable to carry out etch-back of a refractory metal layer until the insulating film is exposed in the state where a wafer is caused to be held at a high temperature to allow the etchrate to be high, and to further carry out over etching subsequent thereto in the state where that wafer is caused to be held at a low temperature to allow the etchrate to be low. However, when an attempt is made to carry out such two-stage process by the existing etching system, an etching chamber for high temperature process and an etching chamber for low temperature process are separately required. As a result, there are the problems that the running cost of the system is increased, and that the occupation space of the system within a clean room is increased, resulting in an increased maintenance expense of the clean zone, etc. In addition, it is apprehended that the throughput is lowered by conveyance between chambers, or opportunity of contamination or pollution is increased.